1. Field of the Invention
The present invention relates to processor scaling between processors in separate chassis.
2. Background of the Related Art
Processors may be interconnected to achieve greater performance. The greater performance may include faster memory access or increased data handling capacity. An interconnection between two or more processors may be referred to as a bus, such as with the front side bus (FSB), or a point to point interconnect, such as with the Intel Corporation's QUICK PATH INTERCONNEC™ (QPI). When an interconnection is made between processors, the processors are referred to as being scaled and a cable used to complete the interconnection is referred to as a scalability cable.
Processor scalability requires a high signal quality electrical connection between the processors. When the processors being scaled are mounted on the same circuit board, such electrical connection may be made with conductive traces that extend from the socket for one processor to the socket for another processor. However, when the processors being scaled are located in different housings, the electrical connection must be allow for mechanical compliance of each housing. For example, mechanical compliance is required to allow each housing to be properly inserted into a chassis and also to resist damage from shock and vibration.